1. Field of the Invention
The present invention relates to a design for a spacer resin (SR) pattern layer that is able to reduce optical coupling loss by guiding light through an optical waveguide for a semiconductor light-emitting element or light-receiving element.
More particularly, the present invention relates to a specific method for forming a spacer resin pattern layer able to precisely align a light-emitting element such as, but not limited to, a vertical-type surface-emitting laser (VCSEL) or light-receiving element such as, a photodetector (PD) formed as a gallium arsenide (GaAs) semiconductor with respect to a waveguide (WG) pattern layer and an electrical circuit (EC) pattern layer arranged in a manner so as to be laminated on each other.
2. Description of Related Art
FIG. 1 is a schematic view showing the configuration of the prior art. The purpose of the present invention is to reduce the optical coupling loss between each element in the basic configuration of such a laminate.
In the basic configuration of such a laminate, optical waveguide pattern layer 50 and electrical circuit pattern layer 70 are arranged so as to be laminated on each other. In the following explanation, enclosing reference numbers and such in parentheses is not meant to have a limiting sense.
Precision alignment is important because the semiconductor chip and the waveguide layer and the electrical circuit layer are required to be optically and electrically connected.
Light-emitting element (VCSEL) 14 or light-receiving element 12, such as a photodetector (PD), is formed on a semiconductor 10. Semiconductor 10 can be silicon (Si). There are no particular limitations with respect to materials.
Here, light-emitting element 14 is typically a VCSEL, and light-receiving element 12 is typically a PD.
In FIG. 1, light-receiving element (PD) 12 is depicted as a GaAs semiconductor. The light from optical waveguide pattern layer 50 is reflected by mirror 58 to input the light to the PD.
The main elements of optical waveguide (WG) pattern layer 50 are core layer 52 and cladding layers 54, 56 surrounding the core (sandwiching the core vertically in the drawing).
The light is reflected at the boundary between core layer 52 and cladding layers 54, 56 to propagate inside core layer 52. Due to this principle, it is expected that the light is confined to the core and goes straight without spreading.
However, the light spreads in the space between core end 53 and mirror 58. The light is connected via space 20 from mirror 58 to light-receiving element 12, but some spreading of the light cannot be avoided. In FIG. 1, the spreading of the beam is exaggerated.
Space 20 from mirror 58 to light-receiving element (PD) 12 is preferably as short as possible.
Because of the significant impact in the reflected direction, the reflection angle of mirror 58 also has to be set with precision.
When a higher response speed is pursued, the effective light-receiving area of light-receiving element (PD) 12 tends to become smaller.
From this standpoint, it is important to precisely align the light from optical waveguide pattern layer 50 with the effective light-receiving area of light-receiving element 12. Coupling loss will increase unless the alignment is precise.
The GaAs semiconductor 10 is connected electrically to electrical circuit pattern layer 70 via filled via 55. In this example, solder bump 18 arranged on pad 16 of semiconductor 10 is used to form an electrical connection with electrical circuit pattern layer 70.
Because filled via 55, in this example, has to physically pass through optical waveguide pattern layer 50, it has to appear as an element of optical waveguide pattern layer 50.
In FIG. 1, optical waveguide pattern layer 50 is depicted as being severed by filled via 55, but the actual optical waveguide pattern layer 50 is continuous in the depth direction of the paper. Therefore, it is important to note that it has not been severed in the depth direction.
This also means, for example, that the depth position of filled via 55 formed to provide an electrical connection also differs from the depth position of mirror 58.
In other words, the depiction of FIG. 1 is meant to be a schematic drawing showing the elements in cross-section for explanatory purposes.
Solder bump 18 also establishes a mechanical connection when it is solidified after melting. Therefore, it fixes semiconductor 10 relative to optical waveguide pattern layer 50 in addition to electrical circuit pattern layer 70.
Therefore, it is important to position filled via 55, in the X direction, Y direction, and Z direction, relative to the position of optical waveguide pattern layer 50.
The precision of the positioning in the X direction and Z direction (the Z direction is the depth direction of the paper) has a direct impact on the effective light-receiving area of light-receiving element 12.
The precision of the positioning in the Y direction has an impact on coupling loss when, as mentioned above, spreading light in space 20 is taken into account.
JP2004-241631 discloses a reverse taper-shaped base member on the light-receiving element.
JP2001-188150 discloses an optical waveguide formed on a substrate and an optical coupler to couple light from the waveguide with an optical component.
JP2002-131586 discloses an optical communication module having a mirror for reflecting optical signals.
JP2003-215371 discloses the placement of a spacer between a VCSEL and an optical waveguide.
JP2007-227643 discloses a tapered reflection path provided between a microlens and a light-receiving element.
JP2003-167175 discloses a curved reflective surface.
However, none of the patent literature discloses a design concept for forming a spacer resin pattern layer having a tapered reflection path which is highly effective at optically coupling light-emitting element 14 or light-receiving element 12 formed as semiconductor 10 relative to both optical waveguide pattern layer 50 and electrical circuit pattern layer 70 on the upper surface of the wafer of semiconductor 10.